1. Field of the Invention
The present invention relates to a production method when a transistor and a circuit are formed on a semiconductor apparatus substrate in a process of producing a semiconductor apparatus.
2. Description of the Related Art
Higher integration of a semiconductor apparatus has been achieved by miniaturization of a pattern dimension with the shorter wavelength of lithography light source and selection of a resist composition suitable for the wavelength. However, delay of EUV exposure techniques slows the miniaturization in pattern dimension due to the shorter wavelength of light source. The latest research and development about the higher integration of a semiconductor apparatus focus on lamination of the semiconductor apparatus through a penetrating wiring and formation of a three-dimensional transistor. In particular, the three-dimensional transistor is noticed in terms of motion at high speed and low power consumption, in addition to the higher integration of the semiconductor apparatus.
Since a substrate for forming a planar transistor has relatively small unevenness, a single-layer resist process and patterning of an organic antireflective film and a single layer resist (hereinafter referred to two-layer process) is mainly used as a conventional process for producing the planar transistor. However, a more three-dimensional structure is formed in a process of producing a three-dimensional transistor of FinFET structure. Therefore, the substrate of the transistor has larger unevenness as compared with the planar transistor. Forming this structure by the conventional two-layer process is made difficult.
As one of methods for solving the problem, a pattern formed by a three-layer process has been investigated. The three-layer process is a process in which a resist under layer film having an etching selectivity different from that of a photoresist film (i.e. a resist upper layer film) is interposed between the resist upper layer film and an organic under layer film, a pattern is formed with the resist upper layer film, the pattern is then transferred to the resist under layer film by dry etching using the upper layer resist as an etching mask, the pattern is transferred to the organic under layer film by dry etching using the pattern as an etching mask, and the pattern is transferred to a substrate to be processed by dry etching using the pattern as an etching mask. A silicon-containing film having good etching selectivity between both the resist upper layer film and the organic under layer film is usually used for the resist under layer film (Patent Document 1).
Specifically, in the three-layer process, a large uneven substrate for forming a three-dimensional transistor is made flat using an organic under layer film having appropriate thickness, a silicon-containing resist under layer film is placed as a hard mask to process the organic under layer film, a pattern is transferred to the silicon-containing resist under layer film using the pattern formed with an upper layer resist as an etching mask, and the organic under layer film is processed using the transferred pattern as a mask. The process has been widely used in a wiring process of the semiconductor apparatus.